1. Field of the Invention
The invention relates in general to a decoding method of a read only memory (ROM), and more particularly to a decoding method of a diode-type ROM array.
2. Description of the Related Art
ROM has been widely applied in digital instruments, such as mini-computer and micro-processor. ROM is used for saving data, such as basic input output system (BIOS), which is not desired to be erased even though the power supply is stopped.
The commonly used ROM uses channel transistors as memory cells. In a process step of programming, dopants are selectively implanted into a certain channel region to adjust the threshold voltage to control the memory cell to be either on or off. FIG. 1 is a top view of a portion of a conventional ROM structure. Polysilicon word lines WL10 are formed over bit lines BL12. The channel regions 14 are the regions under word lines WL10 and between the bit lines BL12. Binary data, 0 or 1, saved in each memory cell is dependent on whether ions are implanted into the channel region 14 or not.
FIG. 2 is the equivalent circuit diagram of a conventional ROM 20. ROM 20 includes a number of word lines WLs which are aligned as parallel arrays and a number of bit lines BLs which are also aligned as parallel arrays. Saving data is accomplised by the combination of different threshold voltages of different memory cells. Logical level "on" or "0" is saved in a transistor 22, which is located in the intersection of bit lines BL2, BL3 and word line WL2, forming a relative low threshold voltage. Logical level "off" or "1" is saved in a transistor 24, which is located in the crossing site of bit lines BL3, BL4 and word line WL1, forming a relative high threshold voltage. By measuring the output current of the memory cell, the data saved in the memory cell can be read out, after a certain potential is given to relative bit lines and a word line of a memory cell. A memory cell 22, which is a transistor having a relative low threshold voltage, is taken as an example. The word line WL2 and the bit line BL2, which are both connected to the transistor 22, are both given a high voltage. A low voltage is given to the bit line BL3. Since the transistor 22 has a relative low threshold voltage and is therefore "on", current flows from bit line BL2 through transistor 22 to bit line BL3, as arrow 25 shows. Therefore, current signal can be detected in bit line BL2 and the data saved can be read out as "0" or "on". To make sure that the current will not flow to the bit line BL1, if the adjacent memory cell 26 also has a relative low threshold voltage, a relative high voltage is given to the bit line BL1. The other bit lines, such as BL3 and BL4, are floating. A transistor 24 is taken as an example of a memory cell having a relative high threshold voltage. The word line WL1 and the bit line BL3, which are both connected to the transistor 24, are both given a high voltage. A low voltage is given to the bit line BL4. Since the transistor 24 has a relative high threshold voltage and is therefore "off". Therefore, current signal can not be detected in bit line BL3 and the data saved can be read out as "1" or "off".
For the above-mentioned conventional ROM, two of the bit lines have to be given high voltage and another one of the bit lines has to be given low voltage as decoding in order to prevent reverse current. Since the breakdown voltage of the junction between the bit line and the channel is about 3 voltage, the operating voltage for decoding is limited to be less than 3 voltage, which results in difficulty in reading information. Moreover, the electric resistance of the heavily doped bit line is too high, which is about 100.OMEGA./.quadrature.(.OMEGA. per square), to increase the operating current and speed up decoding.